update gas

3 files changed, 8 insertions, 32 deletions

diff --git a/arch/x86_64/include/arch/memory/paging/page_entry.hpp b/arch/x86_64/include/arch/memory/paging/page_entry.hpp
index bfb0184..5959801 100644
--- a/arch/x86_64/include/arch/memory/paging/page_entry.hpp
+++ b/arch/x86_64/include/arch/memory/paging/page_entry.hpp
@@ -68,8 +68,7 @@ namespace teachos::arch::memory::paging
     auto calculate_pointed_to_frame() const -> std::optional<allocator::physical_frame>;
 
     /**
-     * @brief Copies the address and flags from the given physical frame into the underlying std::bitset so future calls
-     * to calculate_physical_address() will return the new address and flags instead of the old one.
+     * @brief Copies the address and flags from the given physical frame into the underlying std::bitset
      *
      * @param frame Physical frame that contains the address we want to copy into our underlying std::bitset.
      * @param additional_flags Entry flags which will be copied into our underlying std::bitset.
@@ -88,16 +87,6 @@ namespace teachos::arch::memory::paging
     auto contains_flags(std::bitset<64U> other) const -> bool;
 
   private:
-    /**
-     * @brief Extracts the physical address from the underlying bitset read from bit index 12 - 51.
-     *
-     * @note Is a 52 bit page aligned physical address of the frame of the next page table or the pyhscial address of
-     * the frame for P1 page tables.
-     *
-     * @return Extracted physical address of the next page or of the frame for P1 page tables.
-     */
-    auto calculate_physical_address() const -> std::size_t;
-
     std::bitset<64U> flags;  ///< Underlying bitset used to read the flags from. Bits 9 - 11 and 52 - 62 can be
                              ///< freely used for additional flags by the operating system.
   };
diff --git a/arch/x86_64/src/boot/boot.s b/arch/x86_64/src/boot/boot.s
index f04ae44..c1b3203 100644
--- a/arch/x86_64/src/boot/boot.s
+++ b/arch/x86_64/src/boot/boot.s
@@ -271,11 +271,6 @@ enable_paging:
     mov $page_map_level_4, %eax
     mov %eax, %cr3
 
-    /* Map the P4 table recursively */
-    mov $page_map_level_4, %eax
-    or 0b11, %eax /* Write present + writable flags into eax register */
-    mov %eax, (page_map_level_4 + 511 * 8)
-
     /* Enable Physical Address Extension */
     mov %cr4, %eax
     or $(1 << 5), %eax
@@ -317,6 +312,11 @@ enable_sse:
  * page map entries.
  */
 prepare_page_maps:
+    /* Map the P4 table recursively */
+    mov $page_map_level_4, %eax
+    or $0b11, %eax /* Write present + writable flags into eax register */
+    mov %eax, (page_map_level_4 + 511 * 8)
+
     /* Add an entry to the PML4, pointing to the PML3 */
     mov $page_map_level_3, %eax
     or $0x3, %eax
diff --git a/arch/x86_64/src/memory/paging/page_entry.cpp b/arch/x86_64/src/memory/paging/page_entry.cpp
index 8b4aa36..f3b5be1 100644
--- a/arch/x86_64/src/memory/paging/page_entry.cpp
+++ b/arch/x86_64/src/memory/paging/page_entry.cpp
@@ -18,25 +18,12 @@ namespace teachos::arch::memory::paging
   {
     if (contains_flags(PRESENT))
     {
-      auto physical_address = calculate_physical_address();
-      return allocator::physical_frame::containing_address(physical_address & 0x000ffffffffff000);
+      constexpr std::size_t mask = 0x000fffff'fffff000;
+      return allocator::physical_frame::containing_address(flags.to_ullong() & mask);
     }
     return std::nullopt;
   }
 
-  auto entry::calculate_physical_address() const -> std::size_t
-  {
-    constexpr std::size_t start_bit = 12U;
-    constexpr std::size_t end_bit = 52U;
-    size_t value = 0U;
-
-    for (auto i = start_bit; i < end_bit; i++)
-    {
-      value |= (flags[i] ? (1 << (i - start_bit)) : 0);
-    }
-    return value;
-  }
-
   auto entry::contains_flags(std::bitset<64U> other) const -> bool { return (flags & other) == other; }
 
   auto entry::set_entry(allocator::physical_frame frame, std::bitset<64U> additional_flags) -> void