aboutsummaryrefslogtreecommitdiff
path: root/arch/x86_64/src
diff options
context:
space:
mode:
authorMatteo Gmür <matteo.gmuer1@ost.ch>2024-11-05 09:58:05 +0000
committerMatteo Gmür <matteo.gmuer1@ost.ch>2024-11-05 09:58:05 +0000
commitdc80a11864444cae275e9e7be9ae120a92433034 (patch)
tree1aa387f459df60759019e98c7e372ba4319f7555 /arch/x86_64/src
parent77b50aa74e404a7af4b17d05613b21c8e5cd6f49 (diff)
downloadteachos-dc80a11864444cae275e9e7be9ae120a92433034.tar.xz
teachos-dc80a11864444cae275e9e7be9ae120a92433034.zip
Move tlb into seperate subfolder and create cr3 header for reading and writing.
Diffstat (limited to 'arch/x86_64/src')
-rw-r--r--arch/x86_64/src/memory/cpu/cr3.cpp23
-rw-r--r--arch/x86_64/src/memory/cpu/tlb.cpp8
-rw-r--r--arch/x86_64/src/memory/paging/active_page_table.cpp2
-rw-r--r--arch/x86_64/src/memory/paging/tlb.cpp7
4 files changed, 32 insertions, 8 deletions
diff --git a/arch/x86_64/src/memory/cpu/cr3.cpp b/arch/x86_64/src/memory/cpu/cr3.cpp
new file mode 100644
index 0000000..7e48d40
--- /dev/null
+++ b/arch/x86_64/src/memory/cpu/cr3.cpp
@@ -0,0 +1,23 @@
+#include "arch/memory/cpu/cr3.hpp"
+
+#include "arch/exception_handling/assert.hpp"
+
+namespace teachos::arch::memory::cpu
+{
+ auto read_cr3_register() -> allocator::physical_address
+ {
+ allocator::physical_address cr3;
+ asm volatile("movq %%cr3, %[output]" : [output] "=r"(cr3) : /* no input into call */ : "memory");
+ return cr3;
+ }
+
+ auto write_cr3_register(allocator::physical_address new_p4_table_address) -> void
+ {
+ exception_handling::assert(new_p4_table_address % allocator::PAGE_FRAME_SIZE == 0U,
+ "[CR3] Physical address to be written into register must be page aligned");
+ asm volatile("movq %[input], %%cr3"
+ : /* no output from call */
+ : [input] "r"(new_p4_table_address)
+ : "memory");
+ }
+} // namespace teachos::arch::memory::cpu
diff --git a/arch/x86_64/src/memory/cpu/tlb.cpp b/arch/x86_64/src/memory/cpu/tlb.cpp
new file mode 100644
index 0000000..bac46b7
--- /dev/null
+++ b/arch/x86_64/src/memory/cpu/tlb.cpp
@@ -0,0 +1,8 @@
+#include "arch/memory/cpu/tlb.hpp"
+
+namespace teachos::arch::memory::cpu
+{
+ auto tlb_flush(paging::virtual_address address) -> void { asm volatile("invlpg (%0)" ::"r"(address) : "memory"); }
+
+ auto tlb_flush_all() -> void { tlb_flush(PAGE_TABLE_LEVEL_4_ADDRESS); }
+} // namespace teachos::arch::memory::cpu
diff --git a/arch/x86_64/src/memory/paging/active_page_table.cpp b/arch/x86_64/src/memory/paging/active_page_table.cpp
index 033a363..3f62419 100644
--- a/arch/x86_64/src/memory/paging/active_page_table.cpp
+++ b/arch/x86_64/src/memory/paging/active_page_table.cpp
@@ -4,7 +4,7 @@ namespace teachos::arch::memory::paging
{
auto active_page_table::create_or_get() -> active_page_table &
{
- static page_table_handle active_handle{reinterpret_cast<page_table *>(PAGE_TABLE_LEVEL_4_ADDRESS),
+ static page_table_handle active_handle{reinterpret_cast<page_table *>(cpu::PAGE_TABLE_LEVEL_4_ADDRESS),
page_table_handle::LEVEL4};
static active_page_table active_page{active_handle};
return active_page;
diff --git a/arch/x86_64/src/memory/paging/tlb.cpp b/arch/x86_64/src/memory/paging/tlb.cpp
deleted file mode 100644
index c1160dc..0000000
--- a/arch/x86_64/src/memory/paging/tlb.cpp
+++ /dev/null
@@ -1,7 +0,0 @@
-#include "arch/memory/paging/tlb.hpp"
-
-namespace teachos::arch::memory::paging
-{
- auto tlb_flush(virtual_address address) -> void { asm volatile("invlpg (%0)" ::"r"(address) : "memory"); }
- auto tlb_flush_all() -> void { tlb_flush(PAGE_TABLE_LEVEL_4_ADDRESS); }
-} // namespace teachos::arch::memory::paging