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-rw-r--r--arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table.hpp2
-rw-r--r--arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table_pointer.hpp8
-rw-r--r--arch/x86_64/include/arch/kernel/cpu/control_register.hpp4
-rw-r--r--arch/x86_64/include/arch/kernel/cpu/lgdt.hpp19
-rw-r--r--arch/x86_64/include/arch/kernel/cpu/msr.hpp4
-rw-r--r--arch/x86_64/include/arch/kernel/cpu/ss.hpp4
-rw-r--r--arch/x86_64/include/arch/kernel/cpu/tlb.hpp6
-rw-r--r--arch/x86_64/include/arch/memory/paging/active_page_table.hpp2
-rw-r--r--arch/x86_64/include/arch/memory/paging/kernel_mapper.hpp14
9 files changed, 40 insertions, 23 deletions
diff --git a/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table.hpp b/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table.hpp
index daba1fe..45f2d31 100644
--- a/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table.hpp
+++ b/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table.hpp
@@ -11,8 +11,6 @@ namespace teachos::arch::context_switching::descriptor_table
auto create_global_descriptor_table() -> global_descriptor_table;
- auto load_global_descriptor_table(global_descriptor_table_pointer gdt_pointer) -> void;
-
auto initialize_global_descriptor_table() -> global_descriptor_table;
} // namespace teachos::arch::context_switching::descriptor_table
diff --git a/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table_pointer.hpp b/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table_pointer.hpp
index c2925fd..0305bff 100644
--- a/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table_pointer.hpp
+++ b/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table_pointer.hpp
@@ -1,8 +1,6 @@
#ifndef TEACHOS_ARCH_X86_64_CONTEXT_SWITCHING_DESCRIPTOR_TABLE_GLOBAL_DESCRIPTOR_TABLE_POINTER_HPP
#define TEACHOS_ARCH_X86_64_CONTEXT_SWITCHING_DESCRIPTOR_TABLE_GLOBAL_DESCRIPTOR_TABLE_POINTER_HPP
-#include "arch/context_switching/descriptor_table/global_descriptor_table.hpp"
-
#include <cstdint>
namespace teachos::arch::context_switching::descriptor_table
@@ -15,8 +13,10 @@ namespace teachos::arch::context_switching::descriptor_table
*/
struct global_descriptor_table_pointer
{
- uint16_t table_length; ///< The size of the GDT in bytes.
- global_descriptor_table * address; ///< Pointer to the GDT base address.
+ std::size_t table_length; ///< The size of the GDT in bytes.
+
+ // TODO: Would rather use global_descriptor_table *, but circular dependency
+ uint64_t address; ///< Pointer to the GDT base address.
};
} // namespace teachos::arch::context_switching::descriptor_table
diff --git a/arch/x86_64/include/arch/kernel/cpu/control_register.hpp b/arch/x86_64/include/arch/kernel/cpu/control_register.hpp
index 27c7777..dcaf02d 100644
--- a/arch/x86_64/include/arch/kernel/cpu/control_register.hpp
+++ b/arch/x86_64/include/arch/kernel/cpu/control_register.hpp
@@ -3,7 +3,7 @@
#include <cstdint>
-namespace teachos::arch::memory::cpu
+namespace teachos::arch::kernel::cpu
{
/**
* @brief Control registers that can be read and written to.
@@ -66,6 +66,6 @@ namespace teachos::arch::memory::cpu
*/
auto set_cr0_bit(cr0_flags flag) -> void;
-} // namespace teachos::arch::memory::cpu
+} // namespace teachos::arch::kernel::cpu
#endif // TEACHOS_ARCH_X86_64_KERNEL_CPU_CR3_HPP
diff --git a/arch/x86_64/include/arch/kernel/cpu/lgdt.hpp b/arch/x86_64/include/arch/kernel/cpu/lgdt.hpp
new file mode 100644
index 0000000..633d460
--- /dev/null
+++ b/arch/x86_64/include/arch/kernel/cpu/lgdt.hpp
@@ -0,0 +1,19 @@
+#ifndef TEACHOS_ARCH_X86_64_KERNEL_CPU_LGDT_HPP
+#define TEACHOS_ARCH_X86_64_KERNEL_CPU_LGDT_HPP
+
+#include "arch/context_switching/descriptor_table/global_descriptor_table_pointer.hpp"
+
+#include <bitset>
+#include <cstdint>
+
+namespace teachos::arch::kernel::cpu
+{
+ /**
+ * @brief Loads the global_descriptor_table_pointer into the global descriptor table register (GDTR).
+ */
+ auto load_global_descriptor_table(context_switching::descriptor_table::global_descriptor_table_pointer gdt_pointer)
+ -> void;
+
+} // namespace teachos::arch::kernel::cpu
+
+#endif // TEACHOS_ARCH_X86_64_KERNEL_CPU_LGDT_HPP
diff --git a/arch/x86_64/include/arch/kernel/cpu/msr.hpp b/arch/x86_64/include/arch/kernel/cpu/msr.hpp
index 52d74bd..99d6378 100644
--- a/arch/x86_64/include/arch/kernel/cpu/msr.hpp
+++ b/arch/x86_64/include/arch/kernel/cpu/msr.hpp
@@ -4,7 +4,7 @@
#include <bitset>
#include <cstdint>
-namespace teachos::arch::memory::cpu
+namespace teachos::arch::kernel::cpu
{
/**
* @brief Important flags that can be writen into the Extended Feature Enable Register (EFER).
@@ -59,6 +59,6 @@ namespace teachos::arch::memory::cpu
*/
auto set_efer_bit(efer_flags flag) -> void;
-} // namespace teachos::arch::memory::cpu
+} // namespace teachos::arch::kernel::cpu
#endif // TEACHOS_ARCH_X86_64_KERNEL_CPU_NXE_HPP \ No newline at end of file
diff --git a/arch/x86_64/include/arch/kernel/cpu/ss.hpp b/arch/x86_64/include/arch/kernel/cpu/ss.hpp
index 2d3518e..1fb6448 100644
--- a/arch/x86_64/include/arch/kernel/cpu/ss.hpp
+++ b/arch/x86_64/include/arch/kernel/cpu/ss.hpp
@@ -4,7 +4,7 @@
#include <bitset>
#include <cstdint>
-namespace teachos::arch::memory::cpu
+namespace teachos::arch::kernel::cpu
{
/**
* @brief Represents a segment selector in the x86_64 architecture.
@@ -51,6 +51,6 @@ namespace teachos::arch::memory::cpu
*/
auto write_ss(segment_selector selector) -> void;
-} // namespace teachos::arch::memory::cpu
+} // namespace teachos::arch::kernel::cpu
#endif // TEACHOS_ARCH_X86_64_KERNEL_CPU_SS_HPP
diff --git a/arch/x86_64/include/arch/kernel/cpu/tlb.hpp b/arch/x86_64/include/arch/kernel/cpu/tlb.hpp
index 333cd58..f3e58a6 100644
--- a/arch/x86_64/include/arch/kernel/cpu/tlb.hpp
+++ b/arch/x86_64/include/arch/kernel/cpu/tlb.hpp
@@ -3,7 +3,7 @@
#include "arch/memory/paging/virtual_page.hpp"
-namespace teachos::arch::memory::cpu
+namespace teachos::arch::kernel::cpu
{
/**
* @brief Invalidates any translation lookaside buffer (TLB) entry for the page table the given address is cotained
@@ -12,7 +12,7 @@ namespace teachos::arch::memory::cpu
* @param address Memory address, which will be used to determine the contained page and flush the TLB entry for
* that page.
*/
- auto tlb_flush(paging::virtual_address address) -> void;
+ auto tlb_flush(memory::paging::virtual_address address) -> void;
/**
* @brief Invalidates the translation lookaside buffer (TLB) entry for all page tables.
@@ -22,6 +22,6 @@ namespace teachos::arch::memory::cpu
*/
auto tlb_flush_all() -> void;
-} // namespace teachos::arch::memory::cpu
+} // namespace teachos::arch::kernel::cpu
#endif // TEACHOS_ARCH_X86_64_KERNEL_CPU_TLB_HPP
diff --git a/arch/x86_64/include/arch/memory/paging/active_page_table.hpp b/arch/x86_64/include/arch/memory/paging/active_page_table.hpp
index 9846a21..9e91a8c 100644
--- a/arch/x86_64/include/arch/memory/paging/active_page_table.hpp
+++ b/arch/x86_64/include/arch/memory/paging/active_page_table.hpp
@@ -153,7 +153,7 @@ namespace teachos::arch::memory::paging
}
unmap_page_table_entry(allocator, page, current_handle);
- cpu::tlb_flush(page.start_address());
+ kernel::cpu::tlb_flush(page.start_address());
}
private:
diff --git a/arch/x86_64/include/arch/memory/paging/kernel_mapper.hpp b/arch/x86_64/include/arch/memory/paging/kernel_mapper.hpp
index b137736..8d36fde 100644
--- a/arch/x86_64/include/arch/memory/paging/kernel_mapper.hpp
+++ b/arch/x86_64/include/arch/memory/paging/kernel_mapper.hpp
@@ -77,16 +77,16 @@ namespace teachos::arch::memory::paging
auto remap_elf_kernel_sections(inactive_page_table & inactive_table, temporary_page & temporary_page,
active_page_table & active_table) -> void
{
- auto const backup =
- allocator::physical_frame::containing_address(cpu::read_control_register(cpu::control_register::CR3));
+ auto const backup = allocator::physical_frame::containing_address(
+ kernel::cpu::read_control_register(kernel::cpu::control_register::CR3));
auto page_table_level4 = temporary_page.map_table_frame(backup, active_table);
active_table[511].set_entry(inactive_table.page_table_level_4_frame, entry::PRESENT | entry::WRITABLE);
- cpu::tlb_flush_all();
+ kernel::cpu::tlb_flush_all();
map_elf_kernel_sections(active_table);
page_table_level4[511].set_entry(backup, entry::PRESENT | entry::WRITABLE);
- cpu::tlb_flush_all();
+ kernel::cpu::tlb_flush_all();
temporary_page.unmap_page(active_table);
}
@@ -99,12 +99,12 @@ namespace teachos::arch::memory::paging
*/
auto switch_active_page_table(inactive_page_table new_table) -> inactive_page_table
{
- auto const backup =
- allocator::physical_frame::containing_address(cpu::read_control_register(cpu::control_register::CR3));
+ auto const backup = allocator::physical_frame::containing_address(
+ kernel::cpu::read_control_register(kernel::cpu::control_register::CR3));
auto const old_table = inactive_page_table{backup};
auto const new_address = new_table.page_table_level_4_frame.start_address();
- cpu::write_control_register(cpu::control_register::CR3, new_address);
+ kernel::cpu::write_control_register(kernel::cpu::control_register::CR3, new_address);
return old_table;
}