From 2e4cbd473ff3bb7ac7371af39becf830b4fb753b Mon Sep 17 00:00:00 2001
From: Fabian Imhof <fabian.imhof@ost.ch>
Date: Thu, 13 Mar 2025 14:05:45 +0000
Subject: IN_PROGRESS implement gdt initialization

---
 arch/x86_64/src/memory/cpu/control_register.cpp | 72 -------------------------
 arch/x86_64/src/memory/cpu/msr.cpp              | 31 -----------
 arch/x86_64/src/memory/cpu/tlb.cpp              | 16 ------
 3 files changed, 119 deletions(-)
 delete mode 100644 arch/x86_64/src/memory/cpu/control_register.cpp
 delete mode 100644 arch/x86_64/src/memory/cpu/msr.cpp
 delete mode 100644 arch/x86_64/src/memory/cpu/tlb.cpp

(limited to 'arch/x86_64/src/memory/cpu')

diff --git a/arch/x86_64/src/memory/cpu/control_register.cpp b/arch/x86_64/src/memory/cpu/control_register.cpp
deleted file mode 100644
index 7ee88b5..0000000
--- a/arch/x86_64/src/memory/cpu/control_register.cpp
+++ /dev/null
@@ -1,72 +0,0 @@
-#include "arch/memory/cpu/control_register.hpp"
-
-#include "arch/exception_handling/panic.hpp"
-
-#include <type_traits>
-
-namespace teachos::arch::memory::cpu
-{
-  auto read_control_register(control_register cr) -> uint64_t
-  {
-    uint64_t current_value;
-    switch (cr)
-    {
-      case control_register::CR0:
-        asm volatile("mov %%cr0, %[output]" : [output] "=r"(current_value));
-        break;
-      case control_register::CR2:
-        asm volatile("mov %%cr2, %[output]" : [output] "=r"(current_value));
-        break;
-      case control_register::CR3:
-        asm volatile("mov %%cr3, %[output]" : [output] "=r"(current_value));
-        break;
-      case control_register::CR4:
-        asm volatile("mov %%cr4, %[output]" : [output] "=r"(current_value));
-        break;
-      default:
-        exception_handling::panic("[Control Register] Attempted to read non-existent or reserved control register");
-        break;
-    }
-    return current_value;
-  }
-
-  auto write_control_register(control_register cr, uint64_t new_value) -> void
-  {
-    switch (cr)
-    {
-      case control_register::CR0:
-        asm volatile("mov %[input], %%cr0"
-                     : /* no output from call */
-                     : [input] "r"(new_value)
-                     : "memory");
-        break;
-      case control_register::CR2:
-        asm volatile("mov %[input], %%cr2"
-                     : /* no output from call */
-                     : [input] "r"(new_value)
-                     : "memory");
-        break;
-      case control_register::CR3:
-        asm volatile("mov %[input], %%cr3"
-                     : /* no output from call */
-                     : [input] "r"(new_value)
-                     : "memory");
-        break;
-      case control_register::CR4:
-        asm volatile("mov %[input], %%cr4"
-                     : /* no output from call */
-                     : [input] "r"(new_value)
-                     : "memory");
-        break;
-      default:
-        exception_handling::panic("[Control Register] Attempted to write non-existent or reserved control register");
-        break;
-    }
-  }
-
-  auto set_cr0_bit(cr0_flags flag) -> void
-  {
-    auto const cr0 = read_control_register(control_register::CR0);
-    write_control_register(control_register::CR0, static_cast<std::underlying_type<cr0_flags>::type>(flag) | cr0);
-  }
-}  // namespace teachos::arch::memory::cpu
diff --git a/arch/x86_64/src/memory/cpu/msr.cpp b/arch/x86_64/src/memory/cpu/msr.cpp
deleted file mode 100644
index b83f902..0000000
--- a/arch/x86_64/src/memory/cpu/msr.cpp
+++ /dev/null
@@ -1,31 +0,0 @@
-#include "arch/memory/cpu/msr.hpp"
-
-namespace teachos::arch::memory::cpu
-{
-  namespace
-  {
-    auto constexpr IA32_EFER_ADDRESS = 0xC0000080;
-  }
-
-  auto read_msr(uint32_t msr) -> uint64_t
-  {
-    uint32_t low, high;
-    asm volatile("rdmsr" : "=a"(low), "=d"(high) : "c"(msr));
-    return (static_cast<uint64_t>(high) << 32) | low;
-  }
-
-  auto write_msr(uint32_t msr, uint64_t value) -> void
-  {
-    uint32_t low = value & 0xFFFFFFFF;
-    uint32_t high = value >> 32;
-    asm volatile("wrmsr"
-                 : /* no output from call */
-                 : "c"(msr), "a"(low), "d"(high));
-  }
-
-  auto set_efer_bit(efer_flags flag) -> void
-  {
-    auto const efer = read_msr(IA32_EFER_ADDRESS);
-    write_msr(IA32_EFER_ADDRESS, static_cast<std::underlying_type<efer_flags>::type>(flag) | efer);
-  }
-}  // namespace teachos::arch::memory::cpu
diff --git a/arch/x86_64/src/memory/cpu/tlb.cpp b/arch/x86_64/src/memory/cpu/tlb.cpp
deleted file mode 100644
index 591d9fc..0000000
--- a/arch/x86_64/src/memory/cpu/tlb.cpp
+++ /dev/null
@@ -1,16 +0,0 @@
-#include "arch/memory/cpu/tlb.hpp"
-
-#include "arch/memory/cpu/control_register.hpp"
-
-namespace teachos::arch::memory::cpu
-{
-  auto tlb_flush(paging::virtual_address address) -> void
-  {
-    asm volatile("invlpg (%[input])" : /* no output from call */ : [input] "r"(address) : "memory");
-  }
-
-  auto tlb_flush_all() -> void
-  {
-    write_control_register(cpu::control_register::CR3, read_control_register(cpu::control_register::CR3));
-  }
-}  // namespace teachos::arch::memory::cpu
-- 
cgit v1.2.3