From 0c4fd9eaed4a71975879aa83cd2da4b6266a64b5 Mon Sep 17 00:00:00 2001 From: Fabian Imhof Date: Tue, 15 Oct 2024 15:48:43 +0000 Subject: add 4th level page table --- arch/x86_64/src/boot/boot.s | 6 ++++++ arch/x86_64/src/memory/paging.cpp | 27 +++++++++++++++++++++++++++ 2 files changed, 33 insertions(+) (limited to 'arch/x86_64/src') diff --git a/arch/x86_64/src/boot/boot.s b/arch/x86_64/src/boot/boot.s index 0c21c66..29ac58d 100644 --- a/arch/x86_64/src/boot/boot.s +++ b/arch/x86_64/src/boot/boot.s @@ -264,6 +264,12 @@ enable_paging: mov $page_map_level_4, %eax mov %eax, %cr3 + /* Map the P4 table recursively */ + mov $page_map_level_4, %eax + or 0b11, %eax + // TODO: WHY THIS THROW ERROR? + mov %eax, [$page_map_level_4 + 511 * 8] + /* Enable Physical Address Extension */ mov %cr4, %eax or $(1 << 5), %eax diff --git a/arch/x86_64/src/memory/paging.cpp b/arch/x86_64/src/memory/paging.cpp index 445c796..61d9d0f 100644 --- a/arch/x86_64/src/memory/paging.cpp +++ b/arch/x86_64/src/memory/paging.cpp @@ -50,4 +50,31 @@ namespace teachos::arch::memory entry->set_unused(); } } + + auto page_table::next_table_address(std::size_t index) const -> std::optional + { + auto entry = entries[index]; + + if (entry.contains_flags(entry.PRESENT) && !entry.contains_flags(entry.HUGE_PAGE)) + { + std::size_t table_address = reinterpret_cast(this); + return (table_address << 9) | (index << 12); + } + else + { + return std::nullopt; + } + } + + auto page_table::next_table(size_t index) const -> std::optional + { + auto address = next_table_address(index); + + if (address.has_value()) + { + return reinterpret_cast(*address); + } + + return std::nullopt; + } } // namespace teachos::arch::memory -- cgit v1.2.3