From bca36b0c10fcae447c90e211e83987fea28eecdc Mon Sep 17 00:00:00 2001 From: Fabian Imhof Date: Sat, 26 Oct 2024 08:47:26 +0000 Subject: wip --- arch/x86_64/include/arch/boot/pointers.hpp | 2 ++ arch/x86_64/include/arch/memory/paging/page_table.hpp | 5 +++++ arch/x86_64/scripts/kernel.ld | 8 +++----- arch/x86_64/src/boot/boot.s | 16 ++++++++-------- arch/x86_64/src/memory/paging/page_mapper.cpp | 12 +++++++++++- arch/x86_64/src/memory/paging/page_table.cpp | 15 +++++++++------ 6 files changed, 38 insertions(+), 20 deletions(-) (limited to 'arch') diff --git a/arch/x86_64/include/arch/boot/pointers.hpp b/arch/x86_64/include/arch/boot/pointers.hpp index 37840b6..2c42605 100644 --- a/arch/x86_64/include/arch/boot/pointers.hpp +++ b/arch/x86_64/include/arch/boot/pointers.hpp @@ -9,6 +9,8 @@ namespace teachos::arch::boot { extern "C" size_t const multiboot_information_pointer; extern "C" memory::paging::page_table * page_map_level_4; + extern "C" memory::paging::page_table * page_map_level_3; + extern "C" memory::paging::page_table * page_map_level_2; } // namespace teachos::arch::boot #endif diff --git a/arch/x86_64/include/arch/memory/paging/page_table.hpp b/arch/x86_64/include/arch/memory/paging/page_table.hpp index 8250e30..5a072d0 100644 --- a/arch/x86_64/include/arch/memory/paging/page_table.hpp +++ b/arch/x86_64/include/arch/memory/paging/page_table.hpp @@ -46,6 +46,11 @@ namespace teachos::arch::memory::paging */ page_table_handle(page_table * handle, level handle_level); + /** + * @brief Initializes one page table level 3 entry. + */ + void initialize_page_table(); + /** * @brief Set every entry of the page to unused. */ diff --git a/arch/x86_64/scripts/kernel.ld b/arch/x86_64/scripts/kernel.ld index e244ce1..3449828 100644 --- a/arch/x86_64/scripts/kernel.ld +++ b/arch/x86_64/scripts/kernel.ld @@ -59,13 +59,14 @@ SECTIONS *(.boot_stack) } + . = ALIGN(4K); + _end_of_image = .; + /*************************************************************************** * Now it is time to load the 64-bit kernel code. We virtually load it into * the upper 2GiB, while adjusting the linear load address appropriately. We * also make sure to align the loaded data onto a page boundary. ***************************************************************************/ - . = ALIGN(4K); - .init ALIGN(4K) : AT(ADDR (.init)) { /* @@ -126,9 +127,6 @@ SECTIONS *(.bss*) } - . = ALIGN(4K); - _end_of_image = .; - /*************************************************************************** * In accordance with the symbol definitions at the start, we generate some * symbols to mark the end of our loaded image. diff --git a/arch/x86_64/src/boot/boot.s b/arch/x86_64/src/boot/boot.s index 7d6b322..6ed1e0a 100644 --- a/arch/x86_64/src/boot/boot.s +++ b/arch/x86_64/src/boot/boot.s @@ -24,11 +24,11 @@ .global page_map_level_4 page_map_level_4: .skip 512 * 8 -.global page_map_level_3_low -page_map_level_3_low: .skip 512 * 8 +.global page_map_level_3 +page_map_level_3: .skip 512 * 8 -.global page_map_level_2_low -page_map_level_2_low: .skip 512 * 8 +.global page_map_level_2 +page_map_level_2: .skip 512 * 8 /** * Reserve some space for the Multiboot 2 information pointer. @@ -318,14 +318,14 @@ enable_sse: */ prepare_page_maps: /* Add an entry to the PML4, pointing to the low PML3 */ - mov $page_map_level_3_low, %eax + mov $page_map_level_3, %eax or $0x3, %eax mov %eax, (page_map_level_4 + ((0x0000000000100000 >> 39) & 0x1ff) * 8) /* Add an entry to the low PML3, pointing to the low PML2 */ - mov $page_map_level_2_low, %eax + mov $page_map_level_2, %eax or $0x3, %eax - mov %eax, (page_map_level_3_low + ((0x0000000000100000 >> 30) & 0x1ff) * 8) + mov %eax, (page_map_level_3 + ((0x0000000000100000 >> 30) & 0x1ff) * 8) xor %ecx, %ecx @@ -337,7 +337,7 @@ prepare_page_maps: mov $(1 << 21), %eax mul %ecx or $((1 << 0) | (1 << 1) | (1 << 7)), %eax - mov %eax, page_map_level_2_low(,%ecx,8) + mov %eax, page_map_level_2(,%ecx,8) inc %ecx cmp %esi, %ecx diff --git a/arch/x86_64/src/memory/paging/page_mapper.cpp b/arch/x86_64/src/memory/paging/page_mapper.cpp index cd77366..dff9ae4 100644 --- a/arch/x86_64/src/memory/paging/page_mapper.cpp +++ b/arch/x86_64/src/memory/paging/page_mapper.cpp @@ -4,10 +4,20 @@ namespace teachos::arch::memory::paging { + auto create_or_get() -> page_table_handle { + static auto initialized = false; // TODO: As soon as linker error is fixed in toolchain make handle static and return that. - return page_table_handle{arch::boot::page_map_level_4, page_table_handle::LEVEL4}; + page_table_handle active_handle{boot::page_map_level_4, page_table_handle::LEVEL4}; + + if (!initialized) + { + active_handle.initialize_page_tables(); + initialized = true; + } + + return active_handle; } auto translate_page(virtual_page page) -> std::optional diff --git a/arch/x86_64/src/memory/paging/page_table.cpp b/arch/x86_64/src/memory/paging/page_table.cpp index 2f97a80..b5315a0 100644 --- a/arch/x86_64/src/memory/paging/page_table.cpp +++ b/arch/x86_64/src/memory/paging/page_table.cpp @@ -10,11 +10,6 @@ namespace teachos::arch::memory::paging */ struct page_table { - /** - * @brief Defaulted constructor. - */ - page_table() = default; - /** * @brief Set every entry of the page to unused. */ @@ -105,7 +100,15 @@ namespace teachos::arch::memory::paging : handle(handle) , handle_level(handle_level) { - exception_handling::assert(handle, "[Page table] Attempted to pass nullptr as handle to page table handle method"); + exception_handling::assert(handle, "[Page Table] Attempted to pass nullptr as handle to page table handle method"); + } + + auto page_table_handle::initialize_page_table() -> void + { + exception_handling::assert(handle_level == page_table_handle::LEVEL4, + "[Page Table] Attempted to initialize a page table of level 3 or lower"); + + auto level_3_page_table = boot::page_map_level_3; } auto page_table_handle::zero_entries() -> void { handle->zero_entries(); } -- cgit v1.2.3