From 2e4cbd473ff3bb7ac7371af39becf830b4fb753b Mon Sep 17 00:00:00 2001
From: Fabian Imhof <fabian.imhof@ost.ch>
Date: Thu, 13 Mar 2025 14:05:45 +0000
Subject: IN_PROGRESS implement gdt initialization

---
 arch/x86_64/src/kernel/cpu/control_register.cpp | 72 +++++++++++++++++++++++++
 1 file changed, 72 insertions(+)
 create mode 100644 arch/x86_64/src/kernel/cpu/control_register.cpp

(limited to 'arch/x86_64/src/kernel/cpu/control_register.cpp')

diff --git a/arch/x86_64/src/kernel/cpu/control_register.cpp b/arch/x86_64/src/kernel/cpu/control_register.cpp
new file mode 100644
index 0000000..3051bae
--- /dev/null
+++ b/arch/x86_64/src/kernel/cpu/control_register.cpp
@@ -0,0 +1,72 @@
+#include "arch/kernel/cpu/control_register.hpp"
+
+#include "arch/exception_handling/panic.hpp"
+
+#include <type_traits>
+
+namespace teachos::arch::memory::cpu
+{
+  auto read_control_register(control_register cr) -> uint64_t
+  {
+    uint64_t current_value;
+    switch (cr)
+    {
+      case control_register::CR0:
+        asm volatile("mov %%cr0, %[output]" : [output] "=r"(current_value));
+        break;
+      case control_register::CR2:
+        asm volatile("mov %%cr2, %[output]" : [output] "=r"(current_value));
+        break;
+      case control_register::CR3:
+        asm volatile("mov %%cr3, %[output]" : [output] "=r"(current_value));
+        break;
+      case control_register::CR4:
+        asm volatile("mov %%cr4, %[output]" : [output] "=r"(current_value));
+        break;
+      default:
+        exception_handling::panic("[Control Register] Attempted to read non-existent or reserved control register");
+        break;
+    }
+    return current_value;
+  }
+
+  auto write_control_register(control_register cr, uint64_t new_value) -> void
+  {
+    switch (cr)
+    {
+      case control_register::CR0:
+        asm volatile("mov %[input], %%cr0"
+                     : /* no output from call */
+                     : [input] "r"(new_value)
+                     : "memory");
+        break;
+      case control_register::CR2:
+        asm volatile("mov %[input], %%cr2"
+                     : /* no output from call */
+                     : [input] "r"(new_value)
+                     : "memory");
+        break;
+      case control_register::CR3:
+        asm volatile("mov %[input], %%cr3"
+                     : /* no output from call */
+                     : [input] "r"(new_value)
+                     : "memory");
+        break;
+      case control_register::CR4:
+        asm volatile("mov %[input], %%cr4"
+                     : /* no output from call */
+                     : [input] "r"(new_value)
+                     : "memory");
+        break;
+      default:
+        exception_handling::panic("[Control Register] Attempted to write non-existent or reserved control register");
+        break;
+    }
+  }
+
+  auto set_cr0_bit(cr0_flags flag) -> void
+  {
+    auto const cr0 = read_control_register(control_register::CR0);
+    write_control_register(control_register::CR0, static_cast<std::underlying_type<cr0_flags>::type>(flag) | cr0);
+  }
+}  // namespace teachos::arch::memory::cpu
-- 
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