From 8eb68ccb8837ba867550d16f967d9ef21921abe2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Matteo=20Gm=C3=BCr?= <matteo.gmuer1@ost.ch>
Date: Sun, 10 Nov 2024 12:08:02 +0000
Subject: Finish control register and adjust msr

---
 arch/x86_64/src/memory/cpu/msr.cpp | 8 +++-----
 1 file changed, 3 insertions(+), 5 deletions(-)

(limited to 'arch/x86_64/src/memory/cpu/msr.cpp')

diff --git a/arch/x86_64/src/memory/cpu/msr.cpp b/arch/x86_64/src/memory/cpu/msr.cpp
index 6e3d1d3..b83f902 100644
--- a/arch/x86_64/src/memory/cpu/msr.cpp
+++ b/arch/x86_64/src/memory/cpu/msr.cpp
@@ -4,7 +4,7 @@ namespace teachos::arch::memory::cpu
 {
   namespace
   {
-    constexpr uint32_t IA32_EFER_ADDRESS = 0xC0000080;
+    auto constexpr IA32_EFER_ADDRESS = 0xC0000080;
   }
 
   auto read_msr(uint32_t msr) -> uint64_t
@@ -25,9 +25,7 @@ namespace teachos::arch::memory::cpu
 
   auto set_efer_bit(efer_flags flag) -> void
   {
-    uint64_t const efer = read_msr(IA32_EFER_ADDRESS);
-    write_msr(IA32_EFER_ADDRESS, static_cast<uint64_t>(flag) | efer);
+    auto const efer = read_msr(IA32_EFER_ADDRESS);
+    write_msr(IA32_EFER_ADDRESS, static_cast<std::underlying_type<efer_flags>::type>(flag) | efer);
   }
-
-  auto enable_nxe_bit() -> void { set_efer_bit(efer_flags::NXE); }
 }  // namespace teachos::arch::memory::cpu
-- 
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