From dc80a11864444cae275e9e7be9ae120a92433034 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Matteo=20Gm=C3=BCr?= Date: Tue, 5 Nov 2024 09:58:05 +0000 Subject: Move tlb into seperate subfolder and create cr3 header for reading and writing. --- arch/x86_64/src/memory/cpu/tlb.cpp | 8 ++++++++ 1 file changed, 8 insertions(+) create mode 100644 arch/x86_64/src/memory/cpu/tlb.cpp (limited to 'arch/x86_64/src/memory/cpu/tlb.cpp') diff --git a/arch/x86_64/src/memory/cpu/tlb.cpp b/arch/x86_64/src/memory/cpu/tlb.cpp new file mode 100644 index 0000000..bac46b7 --- /dev/null +++ b/arch/x86_64/src/memory/cpu/tlb.cpp @@ -0,0 +1,8 @@ +#include "arch/memory/cpu/tlb.hpp" + +namespace teachos::arch::memory::cpu +{ + auto tlb_flush(paging::virtual_address address) -> void { asm volatile("invlpg (%0)" ::"r"(address) : "memory"); } + + auto tlb_flush_all() -> void { tlb_flush(PAGE_TABLE_LEVEL_4_ADDRESS); } +} // namespace teachos::arch::memory::cpu -- cgit v1.2.3 From 4c030cbaee174a9f7f42d4f5ca7ddf6debbbe048 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Matteo=20Gm=C3=BCr?= Date: Sat, 9 Nov 2024 16:25:11 +0000 Subject: Fix flush all method and move crash. --- arch/x86_64/src/memory/cpu/tlb.cpp | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) (limited to 'arch/x86_64/src/memory/cpu/tlb.cpp') diff --git a/arch/x86_64/src/memory/cpu/tlb.cpp b/arch/x86_64/src/memory/cpu/tlb.cpp index bac46b7..1663e80 100644 --- a/arch/x86_64/src/memory/cpu/tlb.cpp +++ b/arch/x86_64/src/memory/cpu/tlb.cpp @@ -1,8 +1,13 @@ #include "arch/memory/cpu/tlb.hpp" +#include "arch/memory/cpu/cr3.hpp" + namespace teachos::arch::memory::cpu { - auto tlb_flush(paging::virtual_address address) -> void { asm volatile("invlpg (%0)" ::"r"(address) : "memory"); } + auto tlb_flush(paging::virtual_address address) -> void + { + asm volatile("invlpg (%[input])" : /* no output from call */ : [input] "r"(address) : "memory"); + } - auto tlb_flush_all() -> void { tlb_flush(PAGE_TABLE_LEVEL_4_ADDRESS); } + auto tlb_flush_all() -> void { write_cr3_register(read_cr3_register()); } } // namespace teachos::arch::memory::cpu -- cgit v1.2.3 From 45e7b24f19b3c4557f98996a44d8857d750ca5b3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Matteo=20Gm=C3=BCr?= Date: Sun, 10 Nov 2024 11:45:26 +0000 Subject: Adjust comments and constant --- arch/x86_64/src/memory/cpu/tlb.cpp | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'arch/x86_64/src/memory/cpu/tlb.cpp') diff --git a/arch/x86_64/src/memory/cpu/tlb.cpp b/arch/x86_64/src/memory/cpu/tlb.cpp index 1663e80..591d9fc 100644 --- a/arch/x86_64/src/memory/cpu/tlb.cpp +++ b/arch/x86_64/src/memory/cpu/tlb.cpp @@ -1,6 +1,6 @@ #include "arch/memory/cpu/tlb.hpp" -#include "arch/memory/cpu/cr3.hpp" +#include "arch/memory/cpu/control_register.hpp" namespace teachos::arch::memory::cpu { @@ -9,5 +9,8 @@ namespace teachos::arch::memory::cpu asm volatile("invlpg (%[input])" : /* no output from call */ : [input] "r"(address) : "memory"); } - auto tlb_flush_all() -> void { write_cr3_register(read_cr3_register()); } + auto tlb_flush_all() -> void + { + write_control_register(cpu::control_register::CR3, read_control_register(cpu::control_register::CR3)); + } } // namespace teachos::arch::memory::cpu -- cgit v1.2.3