#include "arch/memory/cpu/msr.hpp"

namespace teachos::arch::memory::cpu
{
  uint64_t read_msr(uint32_t msr)
  {
    uint32_t low, high;
    asm volatile("rdmsr" : "=a"(low), "=d"(high) : "c"(msr));
    return (static_cast<uint64_t>(high) << 32) | low;
  }

  void write_msr(uint32_t msr, uint64_t value)
  {
    uint32_t low = value & 0xFFFFFFFF;
    uint32_t high = value >> 32;
    asm volatile("wrmsr"
                 : /* no output from call */
                 : "c"(msr), "a"(low), "d"(high));
  }

  void set_msr_bit(msr_flags flag)
  {
    uint64_t efer = read_msr(IA32_EFER);
    write_msr(IA32_EFER, static_cast<uint64_t>(flag) | efer);
  }

  void enable_nxe_bit() { set_msr_bit(msr_flags::NXE); }

}  // namespace teachos::arch::memory::cpu