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authorFabian Imhof <fabian.imhof@ost.ch>2025-03-13 15:46:16 +0000
committerFabian Imhof <fabian.imhof@ost.ch>2025-03-13 15:46:16 +0000
commit11db9338dac611ea32e202add5ce5055b54ebb58 (patch)
treefa68d328a1fe5e07e52e32aac866a0bcc57094ab
parentbdbe6d4bc0f2966541bcd5a47c1a4ad9cbff16fa (diff)
downloadteachos-11db9338dac611ea32e202add5ce5055b54ebb58.tar.xz
teachos-11db9338dac611ea32e202add5ce5055b54ebb58.zip
fixup typing and continue adding gdt
-rw-r--r--arch/x86_64/CMakeLists.txt3
-rw-r--r--arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table.hpp2
-rw-r--r--arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table_pointer.hpp8
-rw-r--r--arch/x86_64/include/arch/kernel/cpu/control_register.hpp4
-rw-r--r--arch/x86_64/include/arch/kernel/cpu/lgdt.hpp19
-rw-r--r--arch/x86_64/include/arch/kernel/cpu/msr.hpp4
-rw-r--r--arch/x86_64/include/arch/kernel/cpu/ss.hpp4
-rw-r--r--arch/x86_64/include/arch/kernel/cpu/tlb.hpp6
-rw-r--r--arch/x86_64/include/arch/memory/paging/active_page_table.hpp2
-rw-r--r--arch/x86_64/include/arch/memory/paging/kernel_mapper.hpp14
-rw-r--r--arch/x86_64/src/context_switching/descriptor_table/global_descriptor_table.cpp17
-rw-r--r--arch/x86_64/src/kernel/cpu/control_register.cpp4
-rw-r--r--arch/x86_64/src/kernel/cpu/lgdt.cpp14
-rw-r--r--arch/x86_64/src/kernel/cpu/msr.cpp4
-rw-r--r--arch/x86_64/src/kernel/cpu/ss.cpp8
-rw-r--r--arch/x86_64/src/kernel/cpu/tlb.cpp6
-rw-r--r--arch/x86_64/src/memory/main.cpp4
17 files changed, 77 insertions, 46 deletions
diff --git a/arch/x86_64/CMakeLists.txt b/arch/x86_64/CMakeLists.txt
index 9d59d87..53339d2 100644
--- a/arch/x86_64/CMakeLists.txt
+++ b/arch/x86_64/CMakeLists.txt
@@ -7,10 +7,11 @@ mark_as_advanced(TEACHOS_KERNEL_LINKER_SCRIPT)
target_sources("_kernel" PRIVATE
"src/kernel/main.cpp"
- "src/kernel/cpu/tlb.cpp"
"src/kernel/cpu/control_register.cpp"
+ "src/kernel/cpu/lgdt.cpp"
"src/kernel/cpu/msr.cpp"
"src/kernel/cpu/ss.cpp"
+ "src/kernel/cpu/tlb.cpp"
)
target_link_options("_kernel" PRIVATE
diff --git a/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table.hpp b/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table.hpp
index daba1fe..45f2d31 100644
--- a/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table.hpp
+++ b/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table.hpp
@@ -11,8 +11,6 @@ namespace teachos::arch::context_switching::descriptor_table
auto create_global_descriptor_table() -> global_descriptor_table;
- auto load_global_descriptor_table(global_descriptor_table_pointer gdt_pointer) -> void;
-
auto initialize_global_descriptor_table() -> global_descriptor_table;
} // namespace teachos::arch::context_switching::descriptor_table
diff --git a/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table_pointer.hpp b/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table_pointer.hpp
index c2925fd..0305bff 100644
--- a/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table_pointer.hpp
+++ b/arch/x86_64/include/arch/context_switching/descriptor_table/global_descriptor_table_pointer.hpp
@@ -1,8 +1,6 @@
#ifndef TEACHOS_ARCH_X86_64_CONTEXT_SWITCHING_DESCRIPTOR_TABLE_GLOBAL_DESCRIPTOR_TABLE_POINTER_HPP
#define TEACHOS_ARCH_X86_64_CONTEXT_SWITCHING_DESCRIPTOR_TABLE_GLOBAL_DESCRIPTOR_TABLE_POINTER_HPP
-#include "arch/context_switching/descriptor_table/global_descriptor_table.hpp"
-
#include <cstdint>
namespace teachos::arch::context_switching::descriptor_table
@@ -15,8 +13,10 @@ namespace teachos::arch::context_switching::descriptor_table
*/
struct global_descriptor_table_pointer
{
- uint16_t table_length; ///< The size of the GDT in bytes.
- global_descriptor_table * address; ///< Pointer to the GDT base address.
+ std::size_t table_length; ///< The size of the GDT in bytes.
+
+ // TODO: Would rather use global_descriptor_table *, but circular dependency
+ uint64_t address; ///< Pointer to the GDT base address.
};
} // namespace teachos::arch::context_switching::descriptor_table
diff --git a/arch/x86_64/include/arch/kernel/cpu/control_register.hpp b/arch/x86_64/include/arch/kernel/cpu/control_register.hpp
index 27c7777..dcaf02d 100644
--- a/arch/x86_64/include/arch/kernel/cpu/control_register.hpp
+++ b/arch/x86_64/include/arch/kernel/cpu/control_register.hpp
@@ -3,7 +3,7 @@
#include <cstdint>
-namespace teachos::arch::memory::cpu
+namespace teachos::arch::kernel::cpu
{
/**
* @brief Control registers that can be read and written to.
@@ -66,6 +66,6 @@ namespace teachos::arch::memory::cpu
*/
auto set_cr0_bit(cr0_flags flag) -> void;
-} // namespace teachos::arch::memory::cpu
+} // namespace teachos::arch::kernel::cpu
#endif // TEACHOS_ARCH_X86_64_KERNEL_CPU_CR3_HPP
diff --git a/arch/x86_64/include/arch/kernel/cpu/lgdt.hpp b/arch/x86_64/include/arch/kernel/cpu/lgdt.hpp
new file mode 100644
index 0000000..633d460
--- /dev/null
+++ b/arch/x86_64/include/arch/kernel/cpu/lgdt.hpp
@@ -0,0 +1,19 @@
+#ifndef TEACHOS_ARCH_X86_64_KERNEL_CPU_LGDT_HPP
+#define TEACHOS_ARCH_X86_64_KERNEL_CPU_LGDT_HPP
+
+#include "arch/context_switching/descriptor_table/global_descriptor_table_pointer.hpp"
+
+#include <bitset>
+#include <cstdint>
+
+namespace teachos::arch::kernel::cpu
+{
+ /**
+ * @brief Loads the global_descriptor_table_pointer into the global descriptor table register (GDTR).
+ */
+ auto load_global_descriptor_table(context_switching::descriptor_table::global_descriptor_table_pointer gdt_pointer)
+ -> void;
+
+} // namespace teachos::arch::kernel::cpu
+
+#endif // TEACHOS_ARCH_X86_64_KERNEL_CPU_LGDT_HPP
diff --git a/arch/x86_64/include/arch/kernel/cpu/msr.hpp b/arch/x86_64/include/arch/kernel/cpu/msr.hpp
index 52d74bd..99d6378 100644
--- a/arch/x86_64/include/arch/kernel/cpu/msr.hpp
+++ b/arch/x86_64/include/arch/kernel/cpu/msr.hpp
@@ -4,7 +4,7 @@
#include <bitset>
#include <cstdint>
-namespace teachos::arch::memory::cpu
+namespace teachos::arch::kernel::cpu
{
/**
* @brief Important flags that can be writen into the Extended Feature Enable Register (EFER).
@@ -59,6 +59,6 @@ namespace teachos::arch::memory::cpu
*/
auto set_efer_bit(efer_flags flag) -> void;
-} // namespace teachos::arch::memory::cpu
+} // namespace teachos::arch::kernel::cpu
#endif // TEACHOS_ARCH_X86_64_KERNEL_CPU_NXE_HPP \ No newline at end of file
diff --git a/arch/x86_64/include/arch/kernel/cpu/ss.hpp b/arch/x86_64/include/arch/kernel/cpu/ss.hpp
index 2d3518e..1fb6448 100644
--- a/arch/x86_64/include/arch/kernel/cpu/ss.hpp
+++ b/arch/x86_64/include/arch/kernel/cpu/ss.hpp
@@ -4,7 +4,7 @@
#include <bitset>
#include <cstdint>
-namespace teachos::arch::memory::cpu
+namespace teachos::arch::kernel::cpu
{
/**
* @brief Represents a segment selector in the x86_64 architecture.
@@ -51,6 +51,6 @@ namespace teachos::arch::memory::cpu
*/
auto write_ss(segment_selector selector) -> void;
-} // namespace teachos::arch::memory::cpu
+} // namespace teachos::arch::kernel::cpu
#endif // TEACHOS_ARCH_X86_64_KERNEL_CPU_SS_HPP
diff --git a/arch/x86_64/include/arch/kernel/cpu/tlb.hpp b/arch/x86_64/include/arch/kernel/cpu/tlb.hpp
index 333cd58..f3e58a6 100644
--- a/arch/x86_64/include/arch/kernel/cpu/tlb.hpp
+++ b/arch/x86_64/include/arch/kernel/cpu/tlb.hpp
@@ -3,7 +3,7 @@
#include "arch/memory/paging/virtual_page.hpp"
-namespace teachos::arch::memory::cpu
+namespace teachos::arch::kernel::cpu
{
/**
* @brief Invalidates any translation lookaside buffer (TLB) entry for the page table the given address is cotained
@@ -12,7 +12,7 @@ namespace teachos::arch::memory::cpu
* @param address Memory address, which will be used to determine the contained page and flush the TLB entry for
* that page.
*/
- auto tlb_flush(paging::virtual_address address) -> void;
+ auto tlb_flush(memory::paging::virtual_address address) -> void;
/**
* @brief Invalidates the translation lookaside buffer (TLB) entry for all page tables.
@@ -22,6 +22,6 @@ namespace teachos::arch::memory::cpu
*/
auto tlb_flush_all() -> void;
-} // namespace teachos::arch::memory::cpu
+} // namespace teachos::arch::kernel::cpu
#endif // TEACHOS_ARCH_X86_64_KERNEL_CPU_TLB_HPP
diff --git a/arch/x86_64/include/arch/memory/paging/active_page_table.hpp b/arch/x86_64/include/arch/memory/paging/active_page_table.hpp
index 9846a21..9e91a8c 100644
--- a/arch/x86_64/include/arch/memory/paging/active_page_table.hpp
+++ b/arch/x86_64/include/arch/memory/paging/active_page_table.hpp
@@ -153,7 +153,7 @@ namespace teachos::arch::memory::paging
}
unmap_page_table_entry(allocator, page, current_handle);
- cpu::tlb_flush(page.start_address());
+ kernel::cpu::tlb_flush(page.start_address());
}
private:
diff --git a/arch/x86_64/include/arch/memory/paging/kernel_mapper.hpp b/arch/x86_64/include/arch/memory/paging/kernel_mapper.hpp
index b137736..8d36fde 100644
--- a/arch/x86_64/include/arch/memory/paging/kernel_mapper.hpp
+++ b/arch/x86_64/include/arch/memory/paging/kernel_mapper.hpp
@@ -77,16 +77,16 @@ namespace teachos::arch::memory::paging
auto remap_elf_kernel_sections(inactive_page_table & inactive_table, temporary_page & temporary_page,
active_page_table & active_table) -> void
{
- auto const backup =
- allocator::physical_frame::containing_address(cpu::read_control_register(cpu::control_register::CR3));
+ auto const backup = allocator::physical_frame::containing_address(
+ kernel::cpu::read_control_register(kernel::cpu::control_register::CR3));
auto page_table_level4 = temporary_page.map_table_frame(backup, active_table);
active_table[511].set_entry(inactive_table.page_table_level_4_frame, entry::PRESENT | entry::WRITABLE);
- cpu::tlb_flush_all();
+ kernel::cpu::tlb_flush_all();
map_elf_kernel_sections(active_table);
page_table_level4[511].set_entry(backup, entry::PRESENT | entry::WRITABLE);
- cpu::tlb_flush_all();
+ kernel::cpu::tlb_flush_all();
temporary_page.unmap_page(active_table);
}
@@ -99,12 +99,12 @@ namespace teachos::arch::memory::paging
*/
auto switch_active_page_table(inactive_page_table new_table) -> inactive_page_table
{
- auto const backup =
- allocator::physical_frame::containing_address(cpu::read_control_register(cpu::control_register::CR3));
+ auto const backup = allocator::physical_frame::containing_address(
+ kernel::cpu::read_control_register(kernel::cpu::control_register::CR3));
auto const old_table = inactive_page_table{backup};
auto const new_address = new_table.page_table_level_4_frame.start_address();
- cpu::write_control_register(cpu::control_register::CR3, new_address);
+ kernel::cpu::write_control_register(kernel::cpu::control_register::CR3, new_address);
return old_table;
}
diff --git a/arch/x86_64/src/context_switching/descriptor_table/global_descriptor_table.cpp b/arch/x86_64/src/context_switching/descriptor_table/global_descriptor_table.cpp
index 1cba13c..ca3d7ff 100644
--- a/arch/x86_64/src/context_switching/descriptor_table/global_descriptor_table.cpp
+++ b/arch/x86_64/src/context_switching/descriptor_table/global_descriptor_table.cpp
@@ -1,9 +1,9 @@
-#include "global_descriptor_table.hpp"
+#include "arch/context_switching/descriptor_table/global_descriptor_table.hpp"
+#include "arch/context_switching/descriptor_table/segment_descriptor.hpp"
+#include "arch/kernel/cpu/lgdt.hpp"
#include "arch/stl/vector.hpp"
-#include "segment_descriptor.hpp"
-
namespace teachos::arch::context_switching::descriptor_table
{
auto create_global_descriptor_table() -> global_descriptor_table
@@ -43,15 +43,14 @@ namespace teachos::arch::context_switching::descriptor_table
return global_descriptor_table;
}
- auto load_global_descriptor_table(global_descriptor_table_pointer gdt_pointer) -> void
- {
- //
- }
-
auto initialize_global_descriptor_table() -> global_descriptor_table
{
global_descriptor_table gdt{create_global_descriptor_table()};
+
+ // TODO: Second argument does not work yet (because pointer hpp)
global_descriptor_table_pointer gdt_pointer{gdt.size() - 1, &gdt};
- load_global_descriptor_table(gdt_pointer);
+ kernel::cpu::load_global_descriptor_table(gdt_pointer);
+
+ return gdt;
}
} // namespace teachos::arch::context_switching::descriptor_table \ No newline at end of file
diff --git a/arch/x86_64/src/kernel/cpu/control_register.cpp b/arch/x86_64/src/kernel/cpu/control_register.cpp
index 3051bae..a39a360 100644
--- a/arch/x86_64/src/kernel/cpu/control_register.cpp
+++ b/arch/x86_64/src/kernel/cpu/control_register.cpp
@@ -4,7 +4,7 @@
#include <type_traits>
-namespace teachos::arch::memory::cpu
+namespace teachos::arch::kernel::cpu
{
auto read_control_register(control_register cr) -> uint64_t
{
@@ -69,4 +69,4 @@ namespace teachos::arch::memory::cpu
auto const cr0 = read_control_register(control_register::CR0);
write_control_register(control_register::CR0, static_cast<std::underlying_type<cr0_flags>::type>(flag) | cr0);
}
-} // namespace teachos::arch::memory::cpu
+} // namespace teachos::arch::kernel::cpu
diff --git a/arch/x86_64/src/kernel/cpu/lgdt.cpp b/arch/x86_64/src/kernel/cpu/lgdt.cpp
new file mode 100644
index 0000000..cb13aa8
--- /dev/null
+++ b/arch/x86_64/src/kernel/cpu/lgdt.cpp
@@ -0,0 +1,14 @@
+#include "arch/kernel/cpu/lgdt.hpp"
+
+#include "arch/context_switching/descriptor_table/global_descriptor_table_pointer.hpp"
+
+namespace teachos::arch::kernel::cpu
+{
+ auto load_global_descriptor_table(context_switching::descriptor_table::global_descriptor_table_pointer gdt_pointer)
+ -> void
+ {
+ // TODO: build lgdt argument from global_descriptor_table_pointer (don't know how yet)
+ asm volatile("lgdt (%0)" : : "r"(gdt_pointer));
+ }
+
+} // namespace teachos::arch::kernel::cpu \ No newline at end of file
diff --git a/arch/x86_64/src/kernel/cpu/msr.cpp b/arch/x86_64/src/kernel/cpu/msr.cpp
index 082bca9..6249f8f 100644
--- a/arch/x86_64/src/kernel/cpu/msr.cpp
+++ b/arch/x86_64/src/kernel/cpu/msr.cpp
@@ -1,6 +1,6 @@
#include "arch/kernel/cpu/msr.hpp"
-namespace teachos::arch::memory::cpu
+namespace teachos::arch::kernel::cpu
{
namespace
{
@@ -28,4 +28,4 @@ namespace teachos::arch::memory::cpu
auto const efer = read_msr(IA32_EFER_ADDRESS);
write_msr(IA32_EFER_ADDRESS, static_cast<std::underlying_type<efer_flags>::type>(flag) | efer);
}
-} // namespace teachos::arch::memory::cpu
+} // namespace teachos::arch::kernel::cpu
diff --git a/arch/x86_64/src/kernel/cpu/ss.cpp b/arch/x86_64/src/kernel/cpu/ss.cpp
index b7e52e1..9c8dd61 100644
--- a/arch/x86_64/src/kernel/cpu/ss.cpp
+++ b/arch/x86_64/src/kernel/cpu/ss.cpp
@@ -1,6 +1,6 @@
#include "arch/kernel/cpu/ss.hpp"
-namespace teachos::arch::memory::cpu
+namespace teachos::arch::kernel::cpu
{
segment_selector::segment_selector(uint16_t index, std::bitset<1U> table_indicator,
std::bitset<2U> requested_privilege_level)
@@ -20,14 +20,14 @@ namespace teachos::arch::memory::cpu
auto read_ss() -> uint16_t
{
uint16_t ss;
- __asm__("mov %%ss, %0" : "=r"(ss));
+ asm volatile("mov %%ss, %0" : "=r"(ss));
return ss;
}
auto write_ss(segment_selector selector) -> void
{
uint16_t ss = selector.to_uint16();
- __asm__("mov %0, %%ss" ::"r"(ss));
+ asm volatile("mov %0, %%ss" ::"r"(ss));
}
-} // namespace teachos::arch::memory::cpu \ No newline at end of file
+} // namespace teachos::arch::kernel::cpu \ No newline at end of file
diff --git a/arch/x86_64/src/kernel/cpu/tlb.cpp b/arch/x86_64/src/kernel/cpu/tlb.cpp
index e753c2c..a09001c 100644
--- a/arch/x86_64/src/kernel/cpu/tlb.cpp
+++ b/arch/x86_64/src/kernel/cpu/tlb.cpp
@@ -2,9 +2,9 @@
#include "arch/kernel/cpu/control_register.hpp"
-namespace teachos::arch::memory::cpu
+namespace teachos::arch::kernel::cpu
{
- auto tlb_flush(paging::virtual_address address) -> void
+ auto tlb_flush(memory::paging::virtual_address address) -> void
{
asm volatile("invlpg (%[input])" : /* no output from call */ : [input] "r"(address) : "memory");
}
@@ -13,4 +13,4 @@ namespace teachos::arch::memory::cpu
{
write_control_register(cpu::control_register::CR3, read_control_register(cpu::control_register::CR3));
}
-} // namespace teachos::arch::memory::cpu
+} // namespace teachos::arch::kernel::cpu
diff --git a/arch/x86_64/src/memory/main.cpp b/arch/x86_64/src/memory/main.cpp
index abc7431..a920a20 100644
--- a/arch/x86_64/src/memory/main.cpp
+++ b/arch/x86_64/src/memory/main.cpp
@@ -38,8 +38,8 @@ namespace teachos::arch::memory
auto const memory_information = multiboot::read_multiboot2();
allocator::area_frame_allocator allocator(memory_information);
- cpu::set_cr0_bit(memory::cpu::cr0_flags::WRITE_PROTECT);
- cpu::set_efer_bit(memory::cpu::efer_flags::NXE);
+ kernel::cpu::set_cr0_bit(kernel::cpu::cr0_flags::WRITE_PROTECT);
+ kernel::cpu::set_efer_bit(kernel::cpu::efer_flags::NXE);
paging::kernel_mapper kernel(allocator, memory_information);
auto & active_table = kernel.remap_kernel();