Commit TLB flush

1 files changed, 12 insertions, 1 deletions

diff --git a/arch/x86_64/include/arch/memory/paging/page_mapper.hpp b/arch/x86_64/include/arch/memory/paging/page_mapper.hpp
index 3590dda..4905e9e 100644
--- a/arch/x86_64/include/arch/memory/paging/page_mapper.hpp
+++ b/arch/x86_64/include/arch/memory/paging/page_mapper.hpp
@@ -9,6 +9,17 @@
 
 namespace teachos::arch::memory::paging
 {
+  namespace
+  {
+    /**
+     * @brief Invalidates any translation lookaside buffer (TLB) entries into the page table the given entry is cotained
+     * in. See https://www.felixcloutier.com/x86/invlpg for more information int he used x86 instruction.
+     *
+     * @param entry Any entry into the page table we want to invalidate all cached entries in.
+     */
+    auto invalidate_page_cache(entry * entry) -> void { asm volatile("invlpg (%0)" ::"r"(entry) : "memory"); }
+  }  // namespace
+
   /**
    * @brief Creates a single instance of the level 4 page table table and returns handle to it or alternatively returns
    * the previously created handle instead. The instance is owned by this method and is static, meaning it lives on for
@@ -135,7 +146,7 @@ namespace teachos::arch::memory::paging
     exception_handling::assert(level1_frame.has_value(),
                                "[Page Mapper] Attempted to unmap page, which has not been mapped previously");
     level1_entry.set_unused();
-    // TODO: Flush the translation lookaside buffer to clear the entry from cache as well. (mov cr3, cr3)
+    invalidate_page_cache(&level1_entry);
     // TODO: Deallocate and unmap level 1, 2, 3 page table entry if this was the last page in them.
     // TODO: Fix deallocate because it is not yet implemented.
     allocator.deallocate_frame(level1_frame.value());