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| author | Matteo Gmür <matteo.gmuer1@ost.ch> | 2024-10-26 13:43:51 +0000 |
|---|---|---|
| committer | Matteo Gmür <matteo.gmuer1@ost.ch> | 2024-10-26 13:43:51 +0000 |
| commit | ca17ed52ea768f1e1c837207f7d27afa6ed99cc2 (patch) | |
| tree | fec81a2658e1fff0ad3a5428865be9ac5f204245 /arch/x86_64/src/boot/boot.s | |
| parent | d86af47f0b62cb3ae302fb292747944620542db1 (diff) | |
| download | teachos-ca17ed52ea768f1e1c837207f7d27afa6ed99cc2.tar.xz teachos-ca17ed52ea768f1e1c837207f7d27afa6ed99cc2.zip | |
Update boot.s comments and comment initalize page tables out
Diffstat (limited to 'arch/x86_64/src/boot/boot.s')
| -rw-r--r-- | arch/x86_64/src/boot/boot.s | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/x86_64/src/boot/boot.s b/arch/x86_64/src/boot/boot.s index 6ed1e0a..f04ae44 100644 --- a/arch/x86_64/src/boot/boot.s +++ b/arch/x86_64/src/boot/boot.s @@ -17,8 +17,8 @@ * * We need: * - A single PML 4 (since we will only use 4-level paging) - * - 2 PML 3s (since we need to map low (1+MiB) memory) - * - 2 PML 2s (since we need to map low (1+MiB) memory) + * - 1 PML 3 + * - 1 PML 2 */ .global page_map_level_4 @@ -317,12 +317,12 @@ enable_sse: * page map entries. */ prepare_page_maps: - /* Add an entry to the PML4, pointing to the low PML3 */ + /* Add an entry to the PML4, pointing to the PML3 */ mov $page_map_level_3, %eax or $0x3, %eax mov %eax, (page_map_level_4 + ((0x0000000000100000 >> 39) & 0x1ff) * 8) - /* Add an entry to the low PML3, pointing to the low PML2 */ + /* Add an entry to the PML3, pointing to the PML2 */ mov $page_map_level_2, %eax or $0x3, %eax mov %eax, (page_map_level_3 + ((0x0000000000100000 >> 30) & 0x1ff) * 8) |