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authorMatteo Gmür <matteo.gmuer1@ost.ch>2025-03-17 14:51:24 +0000
committerMatteo Gmür <matteo.gmuer1@ost.ch>2025-03-17 14:51:24 +0000
commit3c01f820a064f3120a46aa3afdd9f88ce9e00db3 (patch)
treeca35fdbe1172c1a5a9e1185385b1d49fe6401f47 /arch/x86_64/src/kernel/cpu
parentc56a8a74bc4e9662469db33a85c12586f202985a (diff)
downloadteachos-3c01f820a064f3120a46aa3afdd9f88ce9e00db3.tar.xz
teachos-3c01f820a064f3120a46aa3afdd9f88ce9e00db3.zip
Debug and adjust load task register assembly call. WIP
Diffstat (limited to 'arch/x86_64/src/kernel/cpu')
-rw-r--r--arch/x86_64/src/kernel/cpu/tr.cpp8
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/x86_64/src/kernel/cpu/tr.cpp b/arch/x86_64/src/kernel/cpu/tr.cpp
index d0e037f..e281189 100644
--- a/arch/x86_64/src/kernel/cpu/tr.cpp
+++ b/arch/x86_64/src/kernel/cpu/tr.cpp
@@ -11,6 +11,12 @@ namespace teachos::arch::kernel::cpu
auto load_task_register(uint16_t gdt_offset) -> void
{
- asm volatile("ltr %[input]" : /* no output from call */ : [input] "r"(gdt_offset));
+ // asm volatile("ltr %[input]" : /* no output from call */ : [input] "R"(gdt_offset));
+ // https://www.scs.stanford.edu/05au-cs240c/lab/i386/s07_03.htm
+ asm volatile("mov %[input], %%ax\n"
+ "ltr %%ax\n"
+ : /* no output from call */
+ : [input] "r"(gdt_offset)
+ : "ax");
}
} // namespace teachos::arch::kernel::cpu