aboutsummaryrefslogtreecommitdiff
path: root/arch/x86_64/src/memory/cpu
diff options
context:
space:
mode:
authorMatteo Gmür <matteo.gmuer1@ost.ch>2025-02-21 14:13:39 +0000
committerMatteo Gmür <matteo.gmuer1@ost.ch>2025-02-21 14:13:39 +0000
commit405b5b1018397bff48e32c75e10a6b3b58bb6a20 (patch)
tree69359619d8f0dd498fc5439b9361f27ee28a1cde /arch/x86_64/src/memory/cpu
parent00fd8cf8f72d6c5c3d6150f3ec833ded9e34b2b1 (diff)
downloadteachos-405b5b1018397bff48e32c75e10a6b3b58bb6a20.tar.xz
teachos-405b5b1018397bff48e32c75e10a6b3b58bb6a20.zip
Update factory method code
Diffstat (limited to 'arch/x86_64/src/memory/cpu')
-rw-r--r--arch/x86_64/src/memory/cpu/control_register.cpp8
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/x86_64/src/memory/cpu/control_register.cpp b/arch/x86_64/src/memory/cpu/control_register.cpp
index 298874f..7ee88b5 100644
--- a/arch/x86_64/src/memory/cpu/control_register.cpp
+++ b/arch/x86_64/src/memory/cpu/control_register.cpp
@@ -1,6 +1,6 @@
#include "arch/memory/cpu/control_register.hpp"
-#include "arch/exception_handling/assert.hpp"
+#include "arch/exception_handling/panic.hpp"
#include <type_traits>
@@ -24,8 +24,7 @@ namespace teachos::arch::memory::cpu
asm volatile("mov %%cr4, %[output]" : [output] "=r"(current_value));
break;
default:
- exception_handling::assert(false,
- "[Control Register] Attempted to read non-existent or reserved control register");
+ exception_handling::panic("[Control Register] Attempted to read non-existent or reserved control register");
break;
}
return current_value;
@@ -60,8 +59,7 @@ namespace teachos::arch::memory::cpu
: "memory");
break;
default:
- exception_handling::assert(false,
- "[Control Register] Attempted to write non-existent or reserved control register");
+ exception_handling::panic("[Control Register] Attempted to write non-existent or reserved control register");
break;
}
}