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authorFelix Morgner <felix.morgner@ost.ch>2025-12-16 18:14:11 +0100
committerFelix Morgner <felix.morgner@ost.ch>2025-12-16 18:14:18 +0100
commit81a434499424f432a576469aad402ff18e05e6b4 (patch)
tree004811b21ee6b7c8698903eed47fdf2e35ed35a6 /arch/x86_64/src
parent6dfe8a689cdaf39a8bd00b79d9450f454db47e6b (diff)
downloadteachos-81a434499424f432a576469aad402ff18e05e6b4.tar.xz
teachos-81a434499424f432a576469aad402ff18e05e6b4.zip
x86_64/cpu: fix cr3 configuration
Previously, the address of the PML4 was being stored in the upper 52 bits of CR3. This is not correct, since the entire CR3 stores the frame aligned physical address of the PML4, with the lower bits being used for flags. This means, that in the implementation of the CR3 accessor, the frame number, not the address, must be stored, since the value type is designed using bitfields, reserving the upper 52 bits for address writes.
Diffstat (limited to 'arch/x86_64/src')
0 files changed, 0 insertions, 0 deletions