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| author | Matteo Gmür <matteo.gmuer1@ost.ch> | 2025-06-04 08:32:46 +0000 |
|---|---|---|
| committer | Matteo Gmür <matteo.gmuer1@ost.ch> | 2025-06-04 08:32:46 +0000 |
| commit | 3d83e8087717f71c767e942dbeeac2866b39f4a6 (patch) | |
| tree | 95327dd677c6e388504c345ce38dfc882d50b693 /docs/arch/x86_64/memory/cpu | |
| parent | 9f2e780030e2101d5f7f01f42df805db9a5fa809 (diff) | |
| download | teachos-3d83e8087717f71c767e942dbeeac2866b39f4a6.tar.xz teachos-3d83e8087717f71c767e942dbeeac2866b39f4a6.zip | |
Update documentation generation files
Diffstat (limited to 'docs/arch/x86_64/memory/cpu')
| -rw-r--r-- | docs/arch/x86_64/memory/cpu/control_register.rst | 5 | ||||
| -rw-r--r-- | docs/arch/x86_64/memory/cpu/msr.rst | 5 | ||||
| -rw-r--r-- | docs/arch/x86_64/memory/cpu/tlb.rst | 5 |
3 files changed, 0 insertions, 15 deletions
diff --git a/docs/arch/x86_64/memory/cpu/control_register.rst b/docs/arch/x86_64/memory/cpu/control_register.rst deleted file mode 100644 index f087112..0000000 --- a/docs/arch/x86_64/memory/cpu/control_register.rst +++ /dev/null @@ -1,5 +0,0 @@ -CPU Control Registers -======================= - -.. doxygenfile:: arch/x86_64/include/arch/memory/cpu/control_register.hpp - diff --git a/docs/arch/x86_64/memory/cpu/msr.rst b/docs/arch/x86_64/memory/cpu/msr.rst deleted file mode 100644 index c67d51c..0000000 --- a/docs/arch/x86_64/memory/cpu/msr.rst +++ /dev/null @@ -1,5 +0,0 @@ -CPU Model-Specific Register -======================= - -.. doxygenfile:: arch/x86_64/include/arch/memory/cpu/msr.hpp - diff --git a/docs/arch/x86_64/memory/cpu/tlb.rst b/docs/arch/x86_64/memory/cpu/tlb.rst deleted file mode 100644 index 0d482dc..0000000 --- a/docs/arch/x86_64/memory/cpu/tlb.rst +++ /dev/null @@ -1,5 +0,0 @@ -CPU Translation Lookaside Buffer -======================= - -.. doxygenfile:: arch/x86_64/include/arch/memory/cpu/tlb.hpp - |