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| author | Felix Morgner <felix.morgner@ost.ch> | 2025-12-15 17:13:12 +0100 |
|---|---|---|
| committer | Felix Morgner <felix.morgner@ost.ch> | 2025-12-15 17:13:12 +0100 |
| commit | 7b9482ae637126ac9337876e60f519b493437711 (patch) | |
| tree | 6fc71a253c8b0325d303bd34c95b564ba536ed14 /docs/pre/arch/x86_64/kernel | |
| parent | 116f9332a206767c45095950f09f7c7447b561cf (diff) | |
| parent | a9eeec745e29d89afd48ee43d09432eb6fc35be7 (diff) | |
| download | teachos-7b9482ae637126ac9337876e60f519b493437711.tar.xz teachos-7b9482ae637126ac9337876e60f519b493437711.zip | |
os: rework kernel architecture
Rework the code structure and architecture of the kernel by separating
platform-dependent and platform-independent code more cleanly. As of
this patchset, full feature parity has not been achieved. Nonetheless, a
sufficient subset of functionality has been ported to the new
architecture to demonstrate the feasibility of the new structure.
Diffstat (limited to 'docs/pre/arch/x86_64/kernel')
| -rw-r--r-- | docs/pre/arch/x86_64/kernel/cpu.rst | 9 | ||||
| -rw-r--r-- | docs/pre/arch/x86_64/kernel/cpu/call.rst | 5 | ||||
| -rw-r--r-- | docs/pre/arch/x86_64/kernel/cpu/control_register.rst | 5 | ||||
| -rw-r--r-- | docs/pre/arch/x86_64/kernel/cpu/gdtr.rst | 5 | ||||
| -rw-r--r-- | docs/pre/arch/x86_64/kernel/cpu/idtr.rst | 5 | ||||
| -rw-r--r-- | docs/pre/arch/x86_64/kernel/cpu/if.rst | 5 | ||||
| -rw-r--r-- | docs/pre/arch/x86_64/kernel/cpu/msr.rst | 5 | ||||
| -rw-r--r-- | docs/pre/arch/x86_64/kernel/cpu/segment_register.rst | 5 | ||||
| -rw-r--r-- | docs/pre/arch/x86_64/kernel/cpu/tlb.rst | 5 | ||||
| -rw-r--r-- | docs/pre/arch/x86_64/kernel/cpu/tr.rst | 5 | ||||
| -rw-r--r-- | docs/pre/arch/x86_64/kernel/halt.rst | 5 | ||||
| -rw-r--r-- | docs/pre/arch/x86_64/kernel/main.rst | 5 |
12 files changed, 64 insertions, 0 deletions
diff --git a/docs/pre/arch/x86_64/kernel/cpu.rst b/docs/pre/arch/x86_64/kernel/cpu.rst new file mode 100644 index 0000000..da3dfc0 --- /dev/null +++ b/docs/pre/arch/x86_64/kernel/cpu.rst @@ -0,0 +1,9 @@ +Kernel CPU Registers +=========== + +.. toctree:: + :maxdepth: 2 + :caption: Contents: + :glob: + + cpu/* diff --git a/docs/pre/arch/x86_64/kernel/cpu/call.rst b/docs/pre/arch/x86_64/kernel/cpu/call.rst new file mode 100644 index 0000000..33d15ec --- /dev/null +++ b/docs/pre/arch/x86_64/kernel/cpu/call.rst @@ -0,0 +1,5 @@ +Far Call +======================= + +.. doxygenfile:: arch/x86_64/include/arch/kernel/cpu/call.hpp + diff --git a/docs/pre/arch/x86_64/kernel/cpu/control_register.rst b/docs/pre/arch/x86_64/kernel/cpu/control_register.rst new file mode 100644 index 0000000..a45c6d9 --- /dev/null +++ b/docs/pre/arch/x86_64/kernel/cpu/control_register.rst @@ -0,0 +1,5 @@ +Control Register +======================= + +.. doxygenfile:: arch/x86_64/include/arch/kernel/cpu/control_register.hpp + diff --git a/docs/pre/arch/x86_64/kernel/cpu/gdtr.rst b/docs/pre/arch/x86_64/kernel/cpu/gdtr.rst new file mode 100644 index 0000000..41c0f6b --- /dev/null +++ b/docs/pre/arch/x86_64/kernel/cpu/gdtr.rst @@ -0,0 +1,5 @@ +Global Descriptor Table Register +======================= + +.. doxygenfile:: arch/x86_64/include/arch/kernel/cpu/gdtr.hpp + diff --git a/docs/pre/arch/x86_64/kernel/cpu/idtr.rst b/docs/pre/arch/x86_64/kernel/cpu/idtr.rst new file mode 100644 index 0000000..b4c4bb0 --- /dev/null +++ b/docs/pre/arch/x86_64/kernel/cpu/idtr.rst @@ -0,0 +1,5 @@ +Interrupt Descriptor Table Register +======================= + +.. doxygenfile:: arch/x86_64/include/arch/kernel/cpu/idtr.hpp + diff --git a/docs/pre/arch/x86_64/kernel/cpu/if.rst b/docs/pre/arch/x86_64/kernel/cpu/if.rst new file mode 100644 index 0000000..2dd07b4 --- /dev/null +++ b/docs/pre/arch/x86_64/kernel/cpu/if.rst @@ -0,0 +1,5 @@ +Interrupt Flag +======================= + +.. doxygenfile:: arch/x86_64/include/arch/kernel/cpu/if.hpp + diff --git a/docs/pre/arch/x86_64/kernel/cpu/msr.rst b/docs/pre/arch/x86_64/kernel/cpu/msr.rst new file mode 100644 index 0000000..75c4f47 --- /dev/null +++ b/docs/pre/arch/x86_64/kernel/cpu/msr.rst @@ -0,0 +1,5 @@ +Model Specific Register +======================= + +.. doxygenfile:: arch/x86_64/include/arch/kernel/cpu/msr.hpp + diff --git a/docs/pre/arch/x86_64/kernel/cpu/segment_register.rst b/docs/pre/arch/x86_64/kernel/cpu/segment_register.rst new file mode 100644 index 0000000..8159369 --- /dev/null +++ b/docs/pre/arch/x86_64/kernel/cpu/segment_register.rst @@ -0,0 +1,5 @@ +CPU Segment Register +======================= + +.. doxygenfile:: arch/x86_64/include/arch/kernel/cpu/segment_register.hpp + diff --git a/docs/pre/arch/x86_64/kernel/cpu/tlb.rst b/docs/pre/arch/x86_64/kernel/cpu/tlb.rst new file mode 100644 index 0000000..1ceec1d --- /dev/null +++ b/docs/pre/arch/x86_64/kernel/cpu/tlb.rst @@ -0,0 +1,5 @@ +Translation Lookaside Buffer +======================= + +.. doxygenfile:: arch/x86_64/include/arch/kernel/cpu/tlb.hpp + diff --git a/docs/pre/arch/x86_64/kernel/cpu/tr.rst b/docs/pre/arch/x86_64/kernel/cpu/tr.rst new file mode 100644 index 0000000..a2b234b --- /dev/null +++ b/docs/pre/arch/x86_64/kernel/cpu/tr.rst @@ -0,0 +1,5 @@ +Task Register +======================= + +.. doxygenfile:: arch/x86_64/include/arch/kernel/cpu/tr.hpp + diff --git a/docs/pre/arch/x86_64/kernel/halt.rst b/docs/pre/arch/x86_64/kernel/halt.rst new file mode 100644 index 0000000..c425e81 --- /dev/null +++ b/docs/pre/arch/x86_64/kernel/halt.rst @@ -0,0 +1,5 @@ +Kernel Halt +======================= + +.. doxygenfile:: arch/x86_64/include/arch/kernel/halt.hpp + diff --git a/docs/pre/arch/x86_64/kernel/main.rst b/docs/pre/arch/x86_64/kernel/main.rst new file mode 100644 index 0000000..194bd85 --- /dev/null +++ b/docs/pre/arch/x86_64/kernel/main.rst @@ -0,0 +1,5 @@ +Kernel Main +======================= + +.. doxygenfile:: arch/x86_64/include/arch/kernel/main.hpp + |
