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authorMatteo Gmür <matteo.gmuer1@ost.ch>2025-02-18 10:59:05 +0100
committerMatteo Gmür <matteo.gmuer1@ost.ch>2025-02-18 10:59:05 +0100
commitcd42c21f2460751428b3e1b4ae07ea0b924967bc (patch)
treee3e410f399c3eead444f2a242a19448571fd979a /arch/x86_64/src/memory/cpu/msr.cpp
parent47879f42d70755fcf5473ffb82798b515cb2e21b (diff)
parent3d488e53a1d15fcc01a7b1d23b9585ca7a724864 (diff)
downloadkernel-cd42c21f2460751428b3e1b4ae07ea0b924967bc.tar.xz
kernel-cd42c21f2460751428b3e1b4ae07ea0b924967bc.zip
Merge branch 'feat_memory_manager' into 'develop_sa'
Finish inital draft of Memory Manager See merge request teachos/kernel!3
Diffstat (limited to 'arch/x86_64/src/memory/cpu/msr.cpp')
-rw-r--r--arch/x86_64/src/memory/cpu/msr.cpp31
1 files changed, 31 insertions, 0 deletions
diff --git a/arch/x86_64/src/memory/cpu/msr.cpp b/arch/x86_64/src/memory/cpu/msr.cpp
new file mode 100644
index 0000000..b83f902
--- /dev/null
+++ b/arch/x86_64/src/memory/cpu/msr.cpp
@@ -0,0 +1,31 @@
+#include "arch/memory/cpu/msr.hpp"
+
+namespace teachos::arch::memory::cpu
+{
+ namespace
+ {
+ auto constexpr IA32_EFER_ADDRESS = 0xC0000080;
+ }
+
+ auto read_msr(uint32_t msr) -> uint64_t
+ {
+ uint32_t low, high;
+ asm volatile("rdmsr" : "=a"(low), "=d"(high) : "c"(msr));
+ return (static_cast<uint64_t>(high) << 32) | low;
+ }
+
+ auto write_msr(uint32_t msr, uint64_t value) -> void
+ {
+ uint32_t low = value & 0xFFFFFFFF;
+ uint32_t high = value >> 32;
+ asm volatile("wrmsr"
+ : /* no output from call */
+ : "c"(msr), "a"(low), "d"(high));
+ }
+
+ auto set_efer_bit(efer_flags flag) -> void
+ {
+ auto const efer = read_msr(IA32_EFER_ADDRESS);
+ write_msr(IA32_EFER_ADDRESS, static_cast<std::underlying_type<efer_flags>::type>(flag) | efer);
+ }
+} // namespace teachos::arch::memory::cpu