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| author | Matteo Gmür <matteo.gmuer1@ost.ch> | 2024-11-05 09:58:05 +0000 |
|---|---|---|
| committer | Matteo Gmür <matteo.gmuer1@ost.ch> | 2024-11-05 09:58:05 +0000 |
| commit | dc80a11864444cae275e9e7be9ae120a92433034 (patch) | |
| tree | 1aa387f459df60759019e98c7e372ba4319f7555 /arch/x86_64/src/memory/cpu/tlb.cpp | |
| parent | 77b50aa74e404a7af4b17d05613b21c8e5cd6f49 (diff) | |
| download | kernel-dc80a11864444cae275e9e7be9ae120a92433034.tar.xz kernel-dc80a11864444cae275e9e7be9ae120a92433034.zip | |
Move tlb into seperate subfolder and create cr3 header for reading and writing.
Diffstat (limited to 'arch/x86_64/src/memory/cpu/tlb.cpp')
| -rw-r--r-- | arch/x86_64/src/memory/cpu/tlb.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/x86_64/src/memory/cpu/tlb.cpp b/arch/x86_64/src/memory/cpu/tlb.cpp new file mode 100644 index 0000000..bac46b7 --- /dev/null +++ b/arch/x86_64/src/memory/cpu/tlb.cpp @@ -0,0 +1,8 @@ +#include "arch/memory/cpu/tlb.hpp" + +namespace teachos::arch::memory::cpu +{ + auto tlb_flush(paging::virtual_address address) -> void { asm volatile("invlpg (%0)" ::"r"(address) : "memory"); } + + auto tlb_flush_all() -> void { tlb_flush(PAGE_TABLE_LEVEL_4_ADDRESS); } +} // namespace teachos::arch::memory::cpu |
