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#include "arch/memory/cpu/msr.hpp"
namespace teachos::arch::memory::cpu
{
namespace
{
constexpr uint32_t IA32_EFER_ADDRESS = 0xC0000080;
}
auto read_msr(uint32_t msr) -> uint64_t
{
uint32_t low, high;
asm volatile("rdmsr" : "=a"(low), "=d"(high) : "c"(msr));
return (static_cast<uint64_t>(high) << 32) | low;
}
auto write_msr(uint32_t msr, uint64_t value) -> void
{
uint32_t low = value & 0xFFFFFFFF;
uint32_t high = value >> 32;
asm volatile("wrmsr"
: /* no output from call */
: "c"(msr), "a"(low), "d"(high));
}
auto set_efer_bit(efer_flags flag) -> void
{
uint64_t const efer = read_msr(IA32_EFER_ADDRESS);
write_msr(IA32_EFER_ADDRESS, static_cast<uint64_t>(flag) | efer);
}
auto enable_nxe_bit() -> void { set_efer_bit(efer_flags::NXE); }
} // namespace teachos::arch::memory::cpu
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