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authorMatteo Gmür <matteo.gmuer1@ost.ch>2025-02-18 10:59:05 +0100
committerMatteo Gmür <matteo.gmuer1@ost.ch>2025-02-18 10:59:05 +0100
commitcd42c21f2460751428b3e1b4ae07ea0b924967bc (patch)
treee3e410f399c3eead444f2a242a19448571fd979a /arch/x86_64/src/memory/cpu/tlb.cpp
parent47879f42d70755fcf5473ffb82798b515cb2e21b (diff)
parent3d488e53a1d15fcc01a7b1d23b9585ca7a724864 (diff)
downloadkernel-cd42c21f2460751428b3e1b4ae07ea0b924967bc.tar.xz
kernel-cd42c21f2460751428b3e1b4ae07ea0b924967bc.zip
Merge branch 'feat_memory_manager' into 'develop_sa'
Finish inital draft of Memory Manager See merge request teachos/kernel!3
Diffstat (limited to 'arch/x86_64/src/memory/cpu/tlb.cpp')
-rw-r--r--arch/x86_64/src/memory/cpu/tlb.cpp16
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/x86_64/src/memory/cpu/tlb.cpp b/arch/x86_64/src/memory/cpu/tlb.cpp
new file mode 100644
index 0000000..591d9fc
--- /dev/null
+++ b/arch/x86_64/src/memory/cpu/tlb.cpp
@@ -0,0 +1,16 @@
+#include "arch/memory/cpu/tlb.hpp"
+
+#include "arch/memory/cpu/control_register.hpp"
+
+namespace teachos::arch::memory::cpu
+{
+ auto tlb_flush(paging::virtual_address address) -> void
+ {
+ asm volatile("invlpg (%[input])" : /* no output from call */ : [input] "r"(address) : "memory");
+ }
+
+ auto tlb_flush_all() -> void
+ {
+ write_control_register(cpu::control_register::CR3, read_control_register(cpu::control_register::CR3));
+ }
+} // namespace teachos::arch::memory::cpu