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authorMatteo Gmür <matteo.gmuer1@ost.ch>2024-11-10 12:08:02 +0000
committerMatteo Gmür <matteo.gmuer1@ost.ch>2024-11-10 12:08:02 +0000
commit8eb68ccb8837ba867550d16f967d9ef21921abe2 (patch)
treeb54b066642241060223db5a52ff7ba0ca4fcee3b /arch/x86_64/src/memory/cpu/msr.cpp
parent45e7b24f19b3c4557f98996a44d8857d750ca5b3 (diff)
downloadkernel-8eb68ccb8837ba867550d16f967d9ef21921abe2.tar.xz
kernel-8eb68ccb8837ba867550d16f967d9ef21921abe2.zip
Finish control register and adjust msr
Diffstat (limited to 'arch/x86_64/src/memory/cpu/msr.cpp')
-rw-r--r--arch/x86_64/src/memory/cpu/msr.cpp8
1 files changed, 3 insertions, 5 deletions
diff --git a/arch/x86_64/src/memory/cpu/msr.cpp b/arch/x86_64/src/memory/cpu/msr.cpp
index 6e3d1d3..b83f902 100644
--- a/arch/x86_64/src/memory/cpu/msr.cpp
+++ b/arch/x86_64/src/memory/cpu/msr.cpp
@@ -4,7 +4,7 @@ namespace teachos::arch::memory::cpu
{
namespace
{
- constexpr uint32_t IA32_EFER_ADDRESS = 0xC0000080;
+ auto constexpr IA32_EFER_ADDRESS = 0xC0000080;
}
auto read_msr(uint32_t msr) -> uint64_t
@@ -25,9 +25,7 @@ namespace teachos::arch::memory::cpu
auto set_efer_bit(efer_flags flag) -> void
{
- uint64_t const efer = read_msr(IA32_EFER_ADDRESS);
- write_msr(IA32_EFER_ADDRESS, static_cast<uint64_t>(flag) | efer);
+ auto const efer = read_msr(IA32_EFER_ADDRESS);
+ write_msr(IA32_EFER_ADDRESS, static_cast<std::underlying_type<efer_flags>::type>(flag) | efer);
}
-
- auto enable_nxe_bit() -> void { set_efer_bit(efer_flags::NXE); }
} // namespace teachos::arch::memory::cpu